#ifndef __LOONGSON2_SOC_I2C_H
#define __LOONGSON2_SOC_I2C_H

/* I2C regs */
//APB configured addr 0x1fe0,i2c0 addr is 0x1fe01000
#define LS1A500_I2C0_REG_BASE				0xbff48000
#define LS1A500_I2C0_PRER_LO_REG			(LS1A500_I2C0_REG_BASE + 0x0)
#define LS1A500_I2C0_PRER_HI_REG			(LS1A500_I2C0_REG_BASE + 0x1)
#define LS1A500_I2C0_CTR_REG   				(LS1A500_I2C0_REG_BASE + 0x2)
#define LS1A500_I2C0_TXR_REG   				(LS1A500_I2C0_REG_BASE + 0x3)
#define LS1A500_I2C0_RXR_REG    			(LS1A500_I2C0_REG_BASE + 0x3)
#define LS1A500_I2C0_CR_REG     			(LS1A500_I2C0_REG_BASE + 0x4)
#define LS1A500_I2C0_SR_REG     			(LS1A500_I2C0_REG_BASE + 0x4)

#define LS1A500_I2C1_REG_BASE				0xbff48800
#define LS1A500_I2C1_PRER_LO_REG			(LS1A500_I2C1_REG_BASE + 0x0)
#define LS1A500_I2C1_PRER_HI_REG			(LS1A500_I2C1_REG_BASE + 0x1)
#define LS1A500_I2C1_CTR_REG   				(LS1A500_I2C1_REG_BASE + 0x2)
#define LS1A500_I2C1_TXR_REG   				(LS1A500_I2C1_REG_BASE + 0x3)
#define LS1A500_I2C1_RXR_REG    			(LS1A500_I2C1_REG_BASE + 0x3)
#define LS1A500_I2C1_CR_REG     			(LS1A500_I2C1_REG_BASE + 0x4)
#define LS1A500_I2C1_SR_REG     			(LS1A500_I2C1_REG_BASE + 0x4)

#define LS1A500_I2C4_REG_BASE				0xbff4a000	//PIX0

#define CR_START					0x80
#define CR_STOP						0x40
#define CR_READ						0x20
#define CR_WRITE					0x10
#define CR_ACK						0x8
#define CR_IACK						0x1

#define SR_NOACK					0x80
#define SR_BUSY						0x40
#define SR_AL						0x20
#define SR_TIP						0x2
#define	SR_IF						0x1

#endif
